Jie Lou's Homepage

About Me

I am a scientific researcher at Chair of Integrated Digital Systems and Circuit Design (IDS), RWTH Aachen University, Germany. I received my PhD (Dr.-Ing.) from RWTH Aachen University, Germany, in 2026, and my M.Eng. from Tianjin University, China in 2019.

My master’s research focused on microwave dielectric ceramics in circuit materials and devices. During my PhD studies, I transitioned to the field of integrated circuit design. My current research focuses on energy-efficient hardware design for machine learning and digital signal processing applications.

On the hardware side, I am proficient in ASIC design flow from transistor level design to front-end RTL, back-end P&R, and silicon measurements. On the software side, I am familar with neural network training, pruning and quantization. Currently, I have three chip tapeout experience with multiple designs on 22nm FDSOI technology, covering both standard digital design and mixed-signal approach.

I am currently on the job market and look forward to new experiences and challenges. Please feel free to reach out if you are interested.

News

2026.01.26 I officially become Dr. Lou!
2025.12.01 I have successfully passed my Dr.-Ing. doctoral examination.
2025.09.05 One co-authored paper on Conformer accelerator accepted by ASP-DAC.
2025.04.30 Our mixed-fidelity TDCIM CNN work accepted by GLSVLSI.
2025.03.15 One co-authored paper on uniform pruning accelerator accepted by COOL Chips.
2025.01.22 My PhD thesis research accepted by DATE PhD Forum.
2025.01.20 Our all-digital TDCIM CNN work accepted by ISCAS.
2024.06.21 One co-authored paper on dual-engine accelerator accepted by SOCC.
2024.01.16 One co-authored paper on domain comparison accepted by ISQED.
2023.12.20 Invited to give a talk at Peisu Xia Forum hosted by ICT.
2023.10.03 Our all-digital TDCIM work accepted by TCAS-I.
2023.08.04 One co-authored paper on DSC accelerator accepted by VLSI-SoC.
2023.07.07 Check out Prof. Gemmeke’s Time-Domain Computing talk on YouTube.
2023.06.07 I presented our scalable TDCIM BNN work at the GLSVLSI in Knoxville, TN, USA!
2022.09.22 I presented our all-digital TDCIM BNN work at the ESSCIRC in Milan, Italy!

Publications [Google Scholar]

During PhD

ConfASR: A Conformer Block Accelerator for Speech Recognition Optimized for Edge Devices

Malte Wabnitz, Max Nilovic, Finn Scholz, Dominik Friedrich, Christian Lanius, Jie Lou, Tobias Gemmeke

Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), 2026.
A 22nm 96.83-TOPS/W Time-Domain Compute-in-Memory Engine Utilizing Mixed-Fidelity for Edge-AI Applications

Jie Lou*, Florian Freye*, Christian Lanius, Tobias Gemmeke

Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI), 2025.
GUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution

Yi Chen, Malte Wabnitz, Jie Lou, Christian Lanius, Tobias Gemmeke

IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 2025.
An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm

Jie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke

IEEE International Symposium on Circuits and Systems (ISCAS), 2025.
A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator

Yi Chen, Jie Lou, Christian Lanius, Florian Freye, Johnson Loh, Tobias Gemmeke

Springer Cham, 2024.
EDEA: Efficient Dual-Engine Accelerator for Depthwise Separable Convolution with Direct Data Transfer

Yi Chen, Jie Lou, Malte Wabnitz, Johnson Loh, Tobias Gemmeke

2024 IEEE 37th International System-on-Chip Conference (SOCC), 2024.
Merits of Time-Domain Computing for VMM - A Quantitative Comparison

Florian Freye, Jie Lou, Christian Lanius, Tobias Gemmeke

International Symposium on Quality Electronic Design (ISQED), 2024.
An Energy Efficient All-Digital Time-Domain Compute-in-Memory Macro Optimized for Binary Neural Networks

Jie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke

IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2023.
An Energy-Efficient and Area-Efficient Depthwise Separable Convolution Accelerator with Minimal On-Chip Memory Access

Yi Chen, Jie Lou, Christian Lanius, Florian Freye, Johnson Loh, Tobias Gemmeke

IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC), 2023.
Automatic Generation of Structured Macros using Standard Cells – Application to CIM

Christian Lanius, Jie Lou, Johnson Loh, Tobias Gemmeke

ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2023.
Scalable Time-Domain Compute-in-Memory BNN Engine with 2.06 POPS/W Energy Efficiency for Edge-AI Devices

Jie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke

Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI), 2023.
Memristive Devices for Time Domain Compute-in-Memory

Florian Freye, Jie Lou, Christopher Bengel, Stephan Menzel, Stefan Wiefels, Tobias Gemmeke

IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JxCDC), 2022.
All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks with 1.05 POPS/W Energy Efficiency

Jie Lou, Christian Lanius, Florian Freye, Tim Stadtmann, Tobias Gemmeke

IEEE European Solid State Circuits Conference (ESSCIRC), 2022.
Discrete Steps towards Approximate Computing

Michael Gansen, Jie Lou, Florian Freye, Tobias Gemmeke, Farhad Merchant, Albert Zeyer, Mohammad Zeineldeen, Ralf Schluter, Xin Fan

International Symposium on Quality Electronic Design (ISQED), 2022.

During Master (microwave dielectric ceramics)

Combined synthesis methods for producing LaNbO4 ceramics and investigation of microwave dielectric properties based on complex chemical bond theory

Mi Xiao, Peng Zhang, Jie Lou, Yanshuang Wei, Ping Zhang

Journal of Alloys and Compounds, 2019.
Crystal structure and microwave dielectric properties of low-permittivity Sr2MgSi2O7 ceramic

Mi Xiao, Yanshuang Wei, Hongrui Sun, Jie Lou, Ping Zhang

Journal of Materials Science: Materials in Electronics, 2018.
Structure and microwave dielectric properties of MgZr(Nb1−xSbx)2O8 (0≤x≤0.1) ceramics

Mi Xiao, Susu He, Jie Lou, Ping Zhang

Journal of Alloys and Compounds, 2018.
Characteristics and microwave dielectric properties of low loss MgZr0.85Sn0.15Nb2O8 ceramics

Mi Xiao, Jie Lou, Ping Zhang

Journal of Materials Science: Materials in Electronics, 2018.
Influence of Ge4+ substitution for Zr4+ on the microwave dielectric properties of Mg(Zr1-xGex)Nb2O8 (0≤x≤0.4) ceramics

Mi Xiao, Susu He, Jie Lou, Ping Zhang

Ceramics International, 2018.
Effect of Co2+ substitution on crystal structure and microwave dielectric properties of MgZrNb2O8 ceramics

Mi Xiao, Jie Lou, Yanshuang Wei, Susu He, Ping Zhang

Journal of Alloys and Compounds, 2018.
Effect of Ni2+ substitution on crystal structure and microwave dielectric properties for MgZrNb2O8 ceramics

Mi Xiao, Jie Lou, Yanshuang Wei, Hongrui Sun, Lei Li, Ping Zhang

Journal of Materials Science: Materials in Electronics, 2018.
Crystal structure and microwave dielectric properties of MgZr1-xSnxNb2O8 ceramics

Mi Xiao, Jie Lou, Yanshuang Wei, Ping Zhang

Ceramics International, 2017.
Crystal Structure and Microwave Dielectric Properties of Ta5+ Substituted MgZrNb2O8 Ceramics

Mi Xiao, Jie Lou, Ziqi Zhou, Qingqing Gu, Yanshuang Wei, Ping Zhang

Ceramics International, 2017.

Internship Experience

Institute of Computing Technology, Chinese Academy of Sciences, Beijing

2019.05 - 2019.07
Learned the Rocket Chip Generator and the Chisel hardware language
Developed an uncached, lightweight TileLink (TL-UL) interface

Analog Devices, Inc., Beijing

2017.12 - 2018.05
Developed SPI & UART protocols verification environments using SystemVerilog/UVM
Created testcases, assertions, and functional covergroups for module level verification

Invited Talks

2025.06.30 @ GLSVLSI, New Orleans, LA, USA. A 22nm 96.83-TOPS/W Time-Domain Compute-in-Memory Engine Utilizing Mixed-Fidelity for Edge-AI Applications
2025.05.26 @ ISCAS, London, UK. An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm
2025.03.31 @ DATE, Lyon, France. Low-Power Time-Domain Hardware Accelerator for Edge Computing
2023.12.20 @ Peisu Xia Forum, Beijing, China. Time-Domain Compute-in-Memory
2023.06.07 @ GLSVLSI, Knoxville, TN, USA. Scalable Time-Domain Compute-in-Memory BNN Engine with 2.06 POPS/W Energy Efficiency for Edge-AI Devices
2022.09.22 @ ESSCIRC, Milan, Italy. All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks with 1.05 POPS/W Energy Efficiency

Honors & Awards

Tianjin University Outstanding Graduates, 2019
Tianjin University Student Science Award, 2018
Top Ten Outstanding Youth of School of Electronic Information Engineering (Tianjin University), 2018
China National Scholarship, 2017 & 2018

Teaching

Lectures

Artificial Neural Networks for Line Tracking with Braitenberg Vehicles (2025), RWTH Aachen University
VLSI Design for Digital Signal Processing - Fundamentals (2024, 2025), RWTH Aachen University
Computer Arithmetic – Fundamental (2019, 2023), RWTH Aachen University

Services

Reviewer of IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC)
Reviewer of IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS)
Reviewer of IEEE International Symposium on Circuits and Systems (ISCAS)
Reviewer of IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)
Reviewer of IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
Reviewer of Engineering Applications of Artificial Intelligence (EAAI)
Reviewer of Integration, the VLSI Journal
Reviewer of Results in Engineering
Reviewer of Journal of Systems Architecture
Reviewer of Sustainable Computing: Informatics and Systems

Miscellaneous

I am the finisher of four marathons(PB 4:17:13).